Graph Sparsification Approach to Scalable Parallel SPICE-Accurate Simulation of Post-layout Integrated Circuits

Researcher: Zhuo Feng, PI, Associate Professor, Electrical and Computer Engineering

Sponsor: National Science Foundation: SHF: Small

Amount of Support: $250,701

Duration of Support: 4 years

Abstract: Unlike traditional fast SPICE simulation techniques that rely on a variety of approximation approaches to trade off simulation accuracy for greater speed, SPICE-accurate integrated circuit (IC) simulations can truthfully predict circuit electrical behaviors, and therefore become indispensable for design and verification of nanoscale ICs. However, for post-layout nanoscale circuits, using traditional SPICE-accurate simulation techniques to encapsulate multi-million or even multi-billion devices coupled through complex parasitics can be prohibitively expensive, and thus not applicable to large IC designs, since the runtime and memory cost for solving large sparse matrix problems using direct solution methods will increase quickly with the growing circuit sizes and parasitics densities. To achieve greater simulation efficiency and capacity during post-layout simulations, preconditioned iterative solution techniques have been recently proposed to substitute the direct solution methods. However, existing preconditioned methods for post-layout circuit simulations are typically designed with various assumptions and constraints on the circuit and systems to be analyzed, which therefore cannot be effectively and reliably applied to general-purpose SPICE-accurate circuit simulations. In this research project, the PI will study efficient yet robust circuit-oriented preconditioning approaches for scalable SPICE-accurate post-layout IC simulations by leveraging recent graph sparsification research. By systematically sparsifying linear/nonlinear dynamic networks originated from dense parasitics components and complex device elements of post-layout circuits, scalable, and more importantly, parallelizable preconditioned iterative algorithms will be investigated and developed by the PI to enable much greater speed and capacity for SPICE-accurate IC simulations in both time and frequency domains.

The successful completion of this work will immediately benefit the semiconductor industries. The algorithms and methodologies to be developed through this project will be integrated into undergraduate/graduate level VLSI design/CAD courses, while the research results will be broadly disseminated to major semiconductor and EDA companies for potential industrial applications. The CAD tools developed under this research plan will also be exchanged with collaborating industrial partners. The acquired experience in the proposed research plan is also likely to contribute to computing advances in other science and engineering fields, impacting broader research areas that are related to large/complex system modeling and simulation.

Publications:

Lengfei Han, Xueqian Zhao, and Zhuo Feng. “An Adaptive Graph Sparsification Approach to Scalable Harmonic Balance Analysis of Strongly Nonlinear Post-layout RF Circuits,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015. doi:DOI:10.1109/TCAD.2014.2376991

Xueqian Zhao, Lengfei Han, and Zhuo Feng. “A Performance-Guided Graph Sparsification Approach to Scalable and Robust SPICE-Accurate Integrated Circuit Simulations,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015. doi:DOI: 10.1109/TCAD.2015.2424958

Zhuo Feng. “Fast RC Reduction of Flip-Chip Power Grids Using Geometric Templates,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014. doi:DOI: 10.1109/TVLSI.2013.2290104

Xueqian Zhao, Lengfei Han, and Zhuo Feng . “A Performance-Guided Graph Sparsification Approach to Scalable and Robust SPICE-Accurate Integrated Circuit Simulations. ,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems., 2015.

Zhuo Feng. “Spectral Graph Sparsification in Nearly-Linear Time Leveraging Efficient Spectral Perturbation Analysis,” ACM/IEEE Design Automation Conference, 2016.

Lengfei Han, and Zhuo Feng. “Transient-simulation guided graph sparsification approach to scalable harmonic balance (HB) analysis of post-layout RF circuits leveraging heterogeneous CPU-GPU computing systems,” Proceedings of ACM/IEEE Design Automation Conference (DAC), 2015.

Lengfei Han, Xueqian Zhao, and Zhuo Feng. “An Efficient Graph Sparsification Approach to Scalable Harmonic Balance (HB) Analysis of Strongly Nonlinear RF Circuits,” Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2013.

Lengfei Han, Xueqian Zhao, and Zhuo Feng. “An Adaptive Graph Sparsification Approach to Scalable Harmonic Balance Analysis of Strongly Nonlinear Post-layout RF Circuits,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015.

Xueqian Zhao, Lengfei Han, and Zhuo Feng. “A Performance-Guided Graph Sparsification Approach to Scalable and Robust SPICE-Accurate Integrated Circuit Simulations,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015.

Xueqian Zhao, Zhuo Feng, and Zhuo Cheng. “An Efficient Spectral Graph Sparsification Approach to Scalable Reduction of Large Flip-Chip Power Grids,” Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2014.

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Effective Sampling-Based Miss Ratio Curves: Theory and Practice

Circuit board

Researcher: Zhenlin Wang, PI, Professor, Computer Science

Sponsor: National Science Foundation

Amount of Support: $390,876

Duration of Support: 4 years

Abstract: Caches, such as distributed in-memory cache for key-value store, often play a key role in overall system performance. Miss ratio curves (MRCs) that relate cache miss ratio to cache size are an effective tool for cache management. This project develops a new cache locality theory that can significantly reduce the time and space overhead of MRC construction and thus makes it suitable for online profiling. The research will influence system design in both software and hardware, as nearly every system involves multiple types of cache. The results can thus benefit a wide range of systems from personal desktops to large scale data centers. We will integrate our results into existing open source infrastructure for the industry to adopt. In addition, this project will offer new course materials that motivate core computer science research and practice.

The project investigates a new cache locality theory, applies it to several caching or memory management systems, and examines the impact of different online random sampling techniques. The theory introduces a concept of average eviction time that facilitates modeling data movement in cache. The new model constructs MRCs with data reuse distribution that can be effectively sampled. This model yields a constant space overhead and linear time complexity. The research is focused on theoretical properties and limitations of this model when compared with other recent MRC models. With this lightweight model, the project seeks to guide hardware cache partitioning, improve memory demand prediction and management in a virtualized system, and optimize key-value memory cache allocation.

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Combining Data and Instruction Level Parallelism through Demand Driven Execution of Imperative Programs

Futuristic technology – Cool blue image of a computer cpu

Researcher: Soner Onder, PI, Professor, Computer Science

Sponsor: National Science Foundation

Amount of Support: $113,910

Duration of Support: 2 years

Abstract: This project advances a new execution paradigm, namely, demand-driven execution (DDE) of imperative programs. It studies the feasibility of the paradigm by establishing theoretical performance bounds, and identifying its key scalability aspects. The primary intellectual merit of the proposal is the DDE methodology and its use in removing impediments to parallelism due to data flow and control flow. The project’s broader significance and importance stems from its impact on the design of future processors, and its synergistic use of compilers and microarchitectures. Processors built using the DDE approach can better utilize computing resources and are energy efficient.

The basic idea behind the DDE methodology is to compile C-like programs such that both instruction-level and data-level parallelism can be used through a collaboration between compilers and microarchitectures. The basis for this collaboration is an executable, intermediate program representation known as “Future Gated Single Assignment” (FGSA) form into which a source program is compiled. The FGSA representation not only can be used by an optimizing compiler but also can be used as hardware instructions which can be directly executed by the microarchitecture.

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Accessible Access Control

programmer from behind and programming code on computer monitor. focus on monitor

Researchers:

Jean Mayo, PI, Associate Professor, Computer Science

Ching-Kuang Shene, co-PI, Professor, Computer Science

Steven Carr, co-PI, Adjunct, Computer Science, Michigan Technological University

Chaoli Wang, co-PI

Sponsor: National Science Foundation

Amount of Support: $199,164

Duration of Support: 3 years

Abstract: Access control is a last line of defense for protecting computer system resources from a compromised process. This is a primary motivation for the principle of least privilege, which requires that a process be given access to only those resources it needs in order to complete its task. Enforcement of this principle is difficult. A strict access control policy can contain tens of thousands of rules, while errors in the policy can interrupt service and put system resources at risk unnecessarily. This project is developing materials that facilitate education on modern access control models and systems. A policy development system leverages visualization to enhance student learning. The policy development system allows graphical development and analysis of access control policies. It runs at the user-level, so that student work does not impact operation of the underlying system and so that access to a specific operating system is not required. A set of web-based tutorials is being developed that are suitable for study out of the classroom. The project results will increase the number of institutions that offer deep coverage of access control in their curriculum and will facilitate development of the relevant expertise by workers who are not able to pursue formal education. Computer system security breaches cost companies billions of dollars per year. By helping to create a workforce trained to use modern access control systems effectively, this project increases the ability of industry to protect electronic data.

Publications: Carr, Steve and Mayo, Jean. “Workshop on Teaching Modern Models of Access Control Hands-on: Tutorial Presentation,” J. Comput. Sci. Coll., v.32, 2016, p. 35–36. doi:1937-4771

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Multistatic GPR for Explosive Hazards Detection (Phase I & II)

Researcher: Timothy Havens, PI, William and Gloria Jackson Associate Professor of Computer Systems, and Director, Institute of Computing and Cybersystems

Sponsor: Akela, Inc. / U.S. Army

Amount of Support: $83,359

Abstract: In this project researchers examine how unmanned aerial vehicles and terrestrial GPR can coordinate to improve buried explosive hazard detection performance.

National University Rail (NURail) Center – Tier I

Researchers:

Pasi Lautala, PI, Associate Professor, Civil and Environmental Engineering, and Director, Rail Transportation Program, Michigan Tech Transportation Institute

Timothy Havens, Co-PI, William and Gloria Jackson Associate Professor of Computer Systems, and Director, Institute of Computing and Cybersystems

Philart Jeon, Co-PI, Adjunct Associate Professor, Computer Science and CLS

Paul Sanders, Co-PI, Patrick Horvath Endowed Professor of Materials Science and Engineering

Sponsor: US Department of Transportation / RITA

Amount of Support: $299,966

Abstract: The National University Rail (NURail) Center is a consortium of seven partner colleges and universities offering an unparalleled combination of strengths in railway transportation engineering research and education in North America. The NURail Center is the first USDOT OST-R University Transportation Center dedicated to the advancement of North American rail transportation. The Center is headquartered at the University of Illinois at Urbana-Champaign and includes researchers and educators who are experts and national leaders in railway infrastructure, systems and vehicles from seven prestigious academic institutions in the United States.

Implementation of Unmanned Aerial Vehicles (UAVs) for Assessment of Transportation Infrastructure

Copter flight against the blue sky. RC aerial drone.

Researchers:

Colin Brooks, PI, PhD Student, Biological Sciences

Timothy Havens, Co-PI, William and Gloria Jackson Associate Professor of Computer Systems

Kuilin Zhang, Co-PI, Assistant Professor, Civil and Environmental Engineering

Richard Dobson, Co-PI

Tess Ahlborn, Co-PI, Professor, Civil and Environmental Engineering

A. Mukherjee, Co-PI, Associate Professor, Civil and Environmental Engineering

Sponsor: Michigan Dept. Transportation (MDOT)

Amount of Support: $598,526

Abstract: As unmanned aerial vehicle (UAV) technology has advanced to become more capable at lower cost, it offers transportation agencies a more rapid and safer alternative to collect data for a variety of applications, including condition assessment, traffic monitoring, construction, asset management, operations, and other applications. Through successful research, development, and demonstrations during Phase 1 of this project, the Michigan Tech team was able to test multiple sensors on a Michigan-made multirotor UAV platform, along with other UAVs, enabling the collection of data types such as optical light detection and ranging (LiDAR) and thermal to achieve a detailed view of a bridge deck both on the surface and subsurface. These methods were developed to represent the type of data collected through Michigan Department of Transportation (MDOT) manual inspections. Further development of UAV technology for the use of transportation infrastructure assessment is required in order to fully implement these technologies into MDOT day-to-day operations. By successfully continuing UAV research and development for MDOT, the Michigan Tech team will produce practical applications of large datasets that will support MDOT’s business models and decision making processes.

Heterogeneous Multisensor Buried Target Detection Using Spatiotemporal Feature Learning

Researchers:

Timothy Havens, PI, William and Gloria Jackson Associate Professor of Computer Systems

Timothy Schulz, Co-PI, University Professor, Electrical and Computer Engineering

Sponsor: U.S. Army Research Office

Amount of Support: $285,900 (for the first year out of a potential 3-year project totaling $983,124)

Abstract: This project will investigate theory and algorithms for multisensor buried target detection that achieve high probability of detection and classification with low false-alarm-rate. The primary sensors of interest are multisensor FLGPR (i.e., FLGPR plus other sensor modalities, such as thermal video or LIDAR) and acoustic/seismic systems, although our methods will be applicable to other modalities as well.

Advanced Signal Processing and Detection Algorithms for Handheld Explosive Hazard Detection

Researchers:

Joseph Burns, PI, Senior Research Scientist, Michigan Tech Research Institute (MTRI)

Timothy Havens, Co-PI, William and Gloria Jackson Associate Professor of Computer Systems, and Director, Institute of Computing and Cybersystems

Brian Thelen, Co-PI

Mark Stuff, Co-PI

Joel LeBlanc, Co-PI

Adam Webb, Co-PI

Sponsor: U.S. Army

Amount of Support: $1,238,255

Abstract: The project investigates theory and algorithms for multi sensor buried target detection that achieve high probability of detection and classification with low false-alarm rate. The primary sensors of interest are handheld GPR and electromagnetic induction sensors.

Adaptive Memory Resource Management in a Data Center -A Transfer Learning Approach

Digital illustration of Cloud computing devices

Researcher: Steven Carr, PI

Sponsor: National Science Foundation, CSR: Small: Collaborative Research

Amount of Support: $112,000

Duration of Support: 5 years

Abstract: Cloud computing has become a dominant scalable computing platform for both online services and conventional data-intensive computing (examples include Amazon’s EC2, Microsoft’s Azure, IBM’s SmartCloud, etc.). Cloud computing data centers share computing resources among a large set of users, providing a cost effective means to allow users access to computational power and data storage not practical for an individual. A data center often has to over-commit its resources to meet Quality of Service contracts. The data center software needs to effectively manage its resources to meet the demands of users submitting a variety of applications, without any prior knowledge of these applications.

This work is focused on the issue of management of memory resources in a data center. Recent progress in transfer learning methods inspires this work in the creation of dynamic models to predict the cache and memory requirements of an application. The project has four main tasks: (i) an investigation into how recent advancements in transfer learning can help solve data center resource management problems, (ii) development of a dynamic cache predictor using on-the-fly virtual machine measurements, (iii) creation of a dynamic memory predictor using runtime characteristics of a virtual machine, and (iv) development of a unified resource management scheme creating a set of heuristics that dynamically adjust cache and memory allocation to fulfill Quality of Service goals. In tasks (i)-(iii), transfer learning methods are employed and explored to facilitate the transfer of knowledge and models to new system environments and applications based on extensive training on existing systems and benchmark applications. The prediction models and management scheme will be evaluated on common benchmarks including SPEC WEB and CloudSuite 2.0. The results of this research will have broad impact on the design and implementation of cloud computing data centers. The results will help improve resource utilization, boost system throughput, and improve predication performance in a cloud computing virtualization system. Additionally, the methods designed and knowledge they impart will advance understanding in both systems research and machine learning.

Link to additional info here.