At the annual Michigan Tech Research Development Day, January 9, 2020, College of Computing dean Adrienne Minerick and Computer Science professor Soner Onder were recognized as the top two College of Computing researchers in terms of 2019 research expenditures. Both Minerick’s and Onder’s total 2019 research expenditures exceeded $174K.
From Florida State University News
A Florida State University researcher is working to make computer processors execute applications in a more energy-efficient manner with the help of a new $1.2 million grant from the National Science Foundation.
“The general goal is to increase performance but to do it in a manner that is more energy efficient than the dominant computer processors that are in use today,” Professor of Computer Science David Whalley said.
To do that, Whalley and his colleague Soner Onder, a professor at Michigan Technological University, hope to more efficiently exploit what’s called instruction-level parallelism, or the ability of a computer to simultaneously execute multiple machine instructions.
“In general, VLIW processors are more energy efficient but cannot approach the performance of OoO processors except in limited domains, such as digital signal processing,” Whalley said.
Whalley’s project, called SCALE for Statically Controlled Asynchronous Lane Execution, is designed to overcome these current limitations. SCALE supports separate execution lanes, so that instructions in separate lanes can execute in parallel and dependencies between instructions in different lanes are identified by the compiler to synchronize these lanes when necessary.
“Providing distinct lanes of instructions allows the compiler to generate code for different modes of execution to adapt to the type of parallelism that is available at each point within an application,” Whalley said.
The grant began this fall and will run through August 2023. Half of the funding will come to Florida State, with the other half supporting Onder’s part of the work at Michigan Technological University. The FSU portion will support two graduate students in computer science.
Soner Onder, professor of computer science, was recently awarded $246,329 for the first year of a four-year NSF grant for his project, “SHF: Medium: Collaborative Research: Statically Controlled Asynchronous Lane Execution (SCALE).” The project is in collaboration with Prof. David Whalley of Florida State University. Michigan Tech is the lead institution in the project, it is expected to total $1.2 million, with Michigan Tech receiving $600,000.
Abstract: Enabling better performing systems benefits applications that span those running on mobile devices to large data applications running on data centers. The efficiency of most applications is still primarily affected by single thread performance. Instruction-level parallelism (ILP) speeds up programs by executing instructions of the program in parallel, with ‘superscalar’ processors achieving maximum performance. At the same time, energy efficiency is a key criteria to keep in mind as such speedup happens, with these two being conflicting criteria in system design. This project develops a Statically Controlled Asynchronous Lane Execution (SCALE) approach that has the potential to meet or exceed the performance of a traditional superscalar processor while approaching the energy efficiency of a very long instruction word (VLIW) processor. As implied by its name, the SCALE approach has the ability to scale to different types and levels of parallelism. The toolset and designs developed in this project will be available as open-source and will also have an impact on both education and research. The SCALE architectural and compiler techniques will be included in undergraduate and graduate curricula.
The SCALE approach supports separate asynchronous execution lanes where dependencies between instructions in different lanes are statically identified by the compiler to provide inter-lane synchronization. Providing distinct lanes of instructions allows the compiler to generate code for different modes of execution to adapt to the type of parallelism that is available at each point within an application. These execution modes include explicit packaging of parallel instructions, parallel and pipelined execution of loop iterations, single program multiple data (SPMD) execution, and independent multi-threading.
This award reflects NSF’s statutory mission and has been deemed worthy of support through evaluation using the Foundation’s intellectual merit and broader impacts review criteria.
https://www.nsf.gov/awardsearch/showAward?AWD_ID=1901005&HistoricalAwards=false
Soner Onder (SAS), professor of computer science, presented a keynote lecture July 8, 2019, at the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIX) on Samos Island, Greece, which was held July 7-11. Onder’s talk was titled, “Form Follows Function: The Case for Homogeneous Computer Architectures.” Onder also participated in the conference’s “The Annual Open Mike Panel.”
Keynote Lecture Abstract: ”Form follows function” is a principle associated with 20th-century modernist architecture and industrial design which says that the shape of a building or object should primarily relate to its intended function or purpose”[2]. For best performance in computer architecture, form must follow function as well. What are form and function in computer architecture? Form is easy to understand and interpret in its dictionary meaning; Function is not so clear-cut. In this talk, I will start with a simple problem, an algorithm, and a basic program representation that will be interpreted by the machine, and show that delivering high performance rests on solving only a handful, but fundamentally difficult problems. I will argue that the mere existence of domain specific solutions that general purpose computing cannot match in performance is a testament that the general purpose computing is ”not general enough”. What makes an architecture ”not general enough” is not the architecture itself, but rather the mismatch between the function its form had followed and the actual semantics of programs. To illustrate the point, I will challenge the widely understood interpretation of instruction-level parallelism (ILP) as ”single-thread performance”, and show that this interpretation is too short-sighted. We can efficiently exploit all types of available parallelism, including process-level, thread-level and data level parallelism, all at the instruction-level, and this approach is both feasible and necessary to combat the complexity that is plaguing our profession. I will then discuss why an executable single-assignment program representation [1] may be the ultimate function whose implementations may result in homogeneous general purpose architectures that can potentially match the performance of accelerators for specific tasks, while exceeding the performance of any accelerator traditional architecture combination for general tasks. I will conclude by discussing our results with Demand-driven Execution (DDE), whose form follows this single-assignment program representation.
About SAMOS (from http://samos-conference.com/): SAMOS is a unique conference. It deals with embedded systems (sort of) but that is not what makes it different. It brings together every year researchers from both academia and industry on the quiet and inspiring northern mountainside of the Mediterranean island of Samos, which in itself is different. But more importantly, it really fosters collaboration rather than competition. Formal and intensive technical sessions are only held in the mornings.A lively panel or distinguished keynote speaker ends the formal part of the day, and leads nicely into the afternoons and evenings — reserved for informal discussions, good food, and the inviting Aegean Sea. The conference papers will be published by Springer’s Lecture Notes in Computer Science – LNCS and will be included in the DBLP Database.
Sonder Onder (SAS), professor of computer science, presented an invited talk at “Yale:80: Pushing the Envelope of Computing for the Future,” held July 1-2, 2019, in Barcelona, Spain. The workshop was organized by Universitat Politècnica de Catalunya in honor of the 80th birthday of Yale Patt, a prominent computer architecture researcher. Onder was one of 23 invitees to give a talk. His lecture was titled, “Program semantics meets architecture: What if we did not have branches?”
View the slides from Onder’s talk: Yale80-in-2019-Soner-Onder
Yale Patt is a professor in the Department of Electrical & Computer Engineering at The University of Texas at Austin, where he holds the Ernest Cockrell, Jr. Centennial Chair in Engineering. He also holds the title of University Distinguished Teaching Professor. Patt was elected to the National Academy of Engineering in 2014, among the highest professional distinctions bestowed upon an engineer. View Patt’s faculty webpage at: http://www.ece.utexas.edu/people/faculty/yale-patt.
Link to the workshop’s website here: http://research.ac.upc.edu/80-in-2019/
Visit the workshop’s Facebook page here: https://www.facebook.com/BSCCNS/posts/workshop-yale-80-in-2019pushing-the-envelope-of-computing-for-the-futurehttprese/2217508564992996/
Soner Onder (SAS, CS) will present a keynote address titled “Form Follows Function: The Case for Continuing ILP and General Purpose Computing Research” at the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIX), Samos Island, Greece, on July 7, 2019.
Dr. Soner Onder (CS, SAS) will present an invited talk titled “Program semantics meets architecture: What if we did not have branches?” at a workshop organized in honor of the 80th birthday of Prof. Yale Patt of University of Texas, Austin. Prof. Patt is a prominent researcher with decades of accomplishments in Computer Architecture.
The workshop, titled “Yale:80 in 2019, Pushing the Envelope of Computing for the Future,” will take place July 1-2, 2019, in Barcelona, Spain. The workshop is organized by Universitat Politècnica de Catalunya and Barcelona Supercomputing Center, and sponsored by the Ministry of Science, Innovation and Universities of Spain, among others.
At the annual awards banquet of the Michigan Tech Institute of Computing and Cybersysytems (ICC), on Friday, April 12, three ICC members received the ICC Achievement Award in recognition of their exceptional contributions to research and learning in the fields of computing.
Soner Önder, director of the ICC Center for Scalable Architectures and Systems and professor of computer science, was recognized for his research in next-generation architectures. Önder is principal investigator of three National Science Foundation (NSF) grants, and he has three NSF grant proposals under review.
“Soner is one of our very top researchers in terms of research expenditures and new awards,” said Tim Havens, ICC director and the William and Gloria Jackson Associate Professor of Computer Systems. “He is also active in developing and implementing the ICC vision and activities.”
Kevin Trewartha, a member of the ICC’s Center for Human-Centered Computing, was recognized for his interdisciplinary and collaborative research at the intersection of technology and human motor movement. Trewartha is an assistant professor with a dual appointment in the departments of Cognitive and Learning Sciences and Kinesiology and Integrative Physiology.
“Kevin encompasses the best of the ICC vision,” said Beth Veinott, director of the ICC Center for Human-Centered Computing and associate professor of cognitive and learning sciences.
Trewartha is co-principal investigator, with ICC member Shane Mueller, of a new, three-year, interdisciplinary and collaborative project funded by the National Institutes of Health. For this research, Trewartha and Mueller are working with UP Health Systems Portage and five graduate and three undergraduate students to investigate how technology supports earlier diagnosis of the neurodegenerative diseases.
Bo Chen, a member of the ICC’s Center for Cyber-Physical Systems and assistant professor of computer science, was recognized for his teaching and research in cybersecurity of mobile devices.
Chen is the co-PI of two external grants on cybersecurity from the National Science Administration, and he has submitted numerous cybersecurity proposals to NSF, NSA, Microsoft, and Google.
“Dr. Bo Chen has demonstrated achievements and contributions to the mission of the ICC since coming to Michigan Tech as a tenure-track CS faculty in fall ’17,” said ICC members Guy Hembroff and Yu Cai in their nomination, adding that during that short time, “Dr. Chen has published one book, five journal papers, and 10 conference papers, and in 2017 he was awarded a Distinguished Paper Award from the prestigious cybersecurity venue, the Annual Computer Security Application Conference (ACSAC ’17).”
Chen is the faculty coach for the MTU NCL (National Cyber League) cyber competition team, and during the fall 2018 regular season under Chen’s leadership, a Michigan Tech CS undergraduate student placed 36th out of 3,350 players in NCL cyber competition. Dr. Chen was also recently recognized for receiving an exceptional “average of seven dimensions” student evaluation score for his teaching, among additional accolades.
The ICC, founded in 2015, promotes collaborative, cross-disciplinary research and learning experiences in the areas of cyber-physical systems, cybersecurity, data sciences, human-centered computing, and scalable architectures and systems. It provides faculty and students the opportunity to work across organizational boundaries to create an environment that mirrors contemporary technological innovation.
Five research centers comprise the ICC. The ICC’s 50 members, who represent 15 academic units at Michigan Tech, are collaborating to conduct impactful research, make valuable contributions in the field of computing, and solve problems of critical national importance.
Visit the ICC website at icc.mtu.edu. Contact the ICC at icc-contact@mtu.edu or 906-487-2518.