Soner Onder Presents Talk in Barcelona, Spain

Soner Onder is pictured on the right in the front.

Sonder Onder (SAS), professor of computer science, presented an invited talk at “Yale:80: Pushing the Envelope of Computing for the Future,” held July 1-2, 2019, in Barcelona, Spain. The workshop was organized by Universitat Politècnica de Catalunya in honor of the 80th birthday of Yale Patt, a prominent computer architecture researcher. Onder was one of 23 invitees to give a talk. His lecture was titled, “Program semantics meets architecture: What if we did not have branches?”

View the slides from Onder’s talk: Yale80-in-2019-Soner-Onder

Yale Patt is a professor in the Department of Electrical & Computer Engineering at The University of Texas at Austin, where he holds the Ernest Cockrell, Jr. Centennial Chair in Engineering. He also holds the title of University Distinguished Teaching Professor. Patt was elected to the National Academy of Engineering in 2014, among the highest professional distinctions bestowed upon an engineer. View Patt’s faculty webpage at:

Link to the workshop’s website here:

Visit the workshop’s Facebook page here:

Soner Onder, Barcelona, Spain
Soner Onder at Sagrada Família, Barcelona, Spain

Soner Onder Presents Keynote at SAMOS XIX

Soner Onder
Soner Onder

Soner Onder (SAS), professor of computer science, presented a keynote lecture July 8, 2019, at the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIX) on Samos Island, Greece, which was held July 7-11. Onder’s talk was titled, “Form Follows Function: The Case for Homogeneous Computer Architectures.” Onder also participated in the conference’s “The Annual Open Mike Panel.”

Keynote Lecture Abstract: ”Form follows function” is a principle associated with 20th-century modernist architecture and industrial design which says that the shape of a building or object should primarily relate to its intended function or purpose”[2]. For best performance in computer architecture, form must follow function as well. What are form and function in computer architecture? Form is easy to understand and interpret in its dictionary meaning; Function is not so clear-cut. In this talk, I will start with a simple problem, an algorithm, and a basic program representation that will be interpreted by the machine, and show that delivering high performance rests on solving only a handful, but fundamentally difficult problems. I will argue that the mere existence of domain specific solutions that general purpose computing cannot match in performance is a testament that the general purpose computing is ”not general enough”. What makes an architecture ”not general enough” is not the architecture itself, but rather the mismatch between the function its form had followed and the actual semantics of programs. To illustrate the point, I will challenge the widely understood interpretation of instruction-level parallelism (ILP) as ”single-thread performance”, and show that this interpretation is too short-sighted. We can efficiently exploit all types of available parallelism, including process-level, thread-level and data level parallelism, all at the instruction-level, and this approach is both feasible and necessary to combat the complexity that is plaguing our profession. I will then discuss why an executable single-assignment program representation [1] may be the ultimate function whose implementations may result in homogeneous general purpose architectures that can potentially match the performance of accelerators for specific tasks, while exceeding the performance of any accelerator traditional architecture combination for general tasks. I will conclude by discussing our results with Demand-driven Execution (DDE), whose form follows this single-assignment program representation.

About SAMOS (from SAMOS is a unique conference. It deals with embedded systems (sort of) but that is not what makes it different. It brings together every year researchers from both academia and industry on the quiet and inspiring northern mountainside of the Mediterranean island of Samos, which in itself is different. But more importantly, it really fosters collaboration rather than competition. Formal and intensive technical sessions are only held in the mornings.A lively panel or distinguished keynote speaker ends the formal part of the day, and leads nicely into the afternoons and evenings — reserved for informal discussions, good food, and the inviting Aegean Sea. The conference papers will be published by Springer’s Lecture Notes in Computer Science – LNCS and will be included in the DBLP Database.

Samos Island, Greece
Samos Island, Greece

Ali Ebnenasir is Co-author of Article in ACM Transactions on Computational Logic

Ali EbnenasirAli Ebnenasir (SAS/CS), professor of computer science, is co-author of the article, “On the verification of livelock-freedom and self-stabilization on parameterized rings,” published in the July 2019 issue of the journal ACM Transactions on Computational Logic. The article is co-authored by Alex Klinkhamer of Google.

Abstract: This article investigates the verification of livelock-freedom and self-stabilization on parameterized rings consisting of symmetric, constant space, deterministic, and self-disabling processes. The results of this article have a significant impact on several fields, including scalable distributed systems, resilient and self-* systems, and verification of parameterized systems. First, we identify necessary and sufficient local conditions for the existence of global livelocks in parameterized unidirectional rings with unbounded (but finite) number of processes under the interleaving semantics. Using a reduction from the periodic domino problem, we show that, in general, verifying livelock-freedom of parameterized unidirectional rings is undecidable (specifically, Π10-complete) even for constant space, deterministic, and self-disabling processes. This result implies that verifying self-stabilization for parameterized rings of self-disabling processes is also undecidable. We also show that verifying livelock-freedom and self-stabilization remain undecidable under (1) synchronous execution semantics, (2) the FIFO consistency model, and (3) any scheduling policy. We then present a new scope-based method for detecting and constructing livelocks in parameterized rings. The proposed semi-algorithm behind our scope-based verification is based on a novel paradigm for the detection of livelocks that totally circumvents state space exploration. Our experimental results on an implementation of the proposed semi-algorithm are very promising as we have found livelocks in parameterized rings in a few microseconds on a regular laptop. The results of this article have significant implications for scalable distributed systems with cyclic topologies.

Citation: Klinkhamer, A., & Ebnenasir, A. (2019). On the verification of livelock-freedom and self-stabilization on parameterized rings. ACM Transactions on Computational Logic, 20(3), 16:1-16:36.

MTU Digital Commons link:

ACM link:

Zhenlin Wang is Co-Author of Article in Parallel Programming Journal

Zhenlin Wang (SAS), professor of computer science, is co-author of the article, “Lightweight and accurate memory allocation in key-value cache,” published in the June 2019 issue of the International Journal of Parallel Programming, which is published by Springer.

Abstract: The use of key-value caches in modern web servers is becoming more and more ubiquitous. Representatively, Memcached as a widely used key-value cache system, originally intended for speeding up dynamic web applications by alleviating database load. One of the key factors affecting the performance of Memcached is the memory allocation among different item classes. How to obtain the most efficient partitioning scheme with low time and space consumption is a focus of attention. In this paper, we propose a lightweight and accurate memory allocation scheme in Memcached, by sampling access patterns, analyzing data locality, and reassigning the memory space. One early study on optimizing memory allocation is LAMA, which uses footprint-based MRC to optimize memory allocation in Memcached. However, LAMA does not model deletion operations in Memcached and its spatial overhead is quite large. We propose a method that consumes only 3% of LAMA space and can handle read, write and deletion operations. Moreover, evaluation results show that the average stable-state miss ratio is reduced by 15.0% and the average stable-state response time is reduced by 12.3% when comparing our method to LAMA.

Citation: Pan, C., Zhou, L., Luo, Y., Wang, X., & Wang, Z. (2019). Lightweight and accurate memory allocation in key-value cache. International Journal of Parallel Programming, 47(3), 451-466.

Digital Commons link:

Springer link:

ADVANCE Team Receives NSF Grant Funding

Adrienne Minerick
Patty Sotirin
Sonia Goltz

The ADVANCE team at Michigan Tech has received a three-year $170,000 research and development grant from the National Science Foundation. This project is part of the one million dollar grant, “ADVANCE Partnership: Joining Forces – A Midwestern Partnership for STEM Faculty Success,” led by Iowa State University in partnership with North Dakota State University, Western Michigan University, and Michigan Tech.

The overall aim of the ADVANCE program is increased retention and career advancement opportunities for underrepresented women and women with family responsibilities working in the STEM departments of midwestern universities. Target audiences for the ADVANCE programs include academic leadership, tenured faculty, and under-represented minorities.

“This partnership is a bold move to realize cross-institutional collaborations supporting faculty career success and equity,” said Dr. Patty Sotirin, interim chair for the Department of Humanities and professor of communication at Michigan Tech. “The grant takes a regional approach to make sure our programs engage with intersectional issues and share resources and ideas that impact Midwest campuses.”

The goal of the newly awarded grant is to create an integrated ADVANCE package of programs that can be implemented across universities in the midwest. This package, called an Integrated Equity Support (IES) system, will expand, integrate and coordinate programs developed with prior ADVANCE NSF funding.

 The IES will include cross-institutional components including mentoring communities, male advocates and allies, and department chair professional development. The project will be implemented in phases: year one will expand three existing ADVANCE programs to include a focus on minorities and faculty with families; year two involves integrating these programs and introducing the package to a university that has not previously implemented them (as a test case); year three involves the expansion of an IES Caucus to facilitate community building and introduce the project to additional Midwestern institutions.

“A long-term goal for Michigan Tech is to institutionalize changes and programs that increase and sustain faculty equity,” noted Dr. Andrew Storer, dean of the School of Forest Resources and Environmental Science (SFRES). “This new NSF award will ensure an enduring return on investment for both the ADVANCE project and the University’s investment in faculty development and retention.” 

Adrienne Minerick, dean of the College of Computing, is principal investigator of the project at Michigan Tech, co-PIs are Sotirin and  Sonia Goltz, professor of organizational behavior in the School of Business and Economics., 

A participant in the NSF ADVANCE program since 2006, Michigan Tech and the ADVANCE team—led by Minerick, Goltz, Sotirin, Storer, and Audrey Mayer, professor of ecology and environmental policy in SFRES—have launched a number of programs aimed at increasing faculty retention, success, and inclusion. They include Advanced Career Management (ACM), Academy for Responsive Leadership, Advocates and Allies, Diversity Literacy Workshops, Early Career Management (ECM), and AMP UP. The ADVANCE initiative also has a Resource Center in Room 102B of the Van Pelt/Opie Library.

Learn more about ADVANCE at Michigan Tech at Contact ADVANCE at

Vertanen Teaches Workshop in Mumbai, India

Keith Vertanen (CS/HCC), associate professor of computer science, traveled to Mumbai, India, in July to co-facilitate a three-day workshop on best practices for writing conference papers. The workshop was presented by ACM SIGCHI and its Asian Development Committee, which works to increase its engagement with researchers and practitioners from Asia. The aim of the workshop was to encourage researchers from Asia to submit papers for the ACM CHI 2021 Conference on Human Factors in Computing Systems.

Vertanen, who is co-chair of the Usability Subcommittee for CHI 2020, presented lectures on paper writing and experimental design to 20 PhD candidates from various universities in India, Sri Lanka, and South Korea. Vertanen also presented a talk on his text entry research and served on an advisory panel that offered feedback to the PhD students on their research in a forum similar to a doctoral consortium. Also co-facilitating the workshop were faculty members from University of Central Lancashire, UK, KAIST University, South Korea, and Georgia Institute of Technology, Atlanta. Visit to learn more about the workshop.

Hembroff Attends KEEN Workshop

Guy Hembroff, associate professor and director of the Medical Informatics graduate program (CC/CyberS), attended the three-day workshop, “Teaching With Impact – Innovating Curriculum With Entrepreneurial Mindset,” in Milwaukee, Wisc., this July.

The workshop, presented by KEEN, a network of engineering faculty working to instill within student engineers an entrepreneurial mindset, introduced faculty participants to the framework of entrepreneurially minded learning (EML), which is centered on curiosity, connections, and creating value.  Hembroff and other participants identified opportunities for EML integration into existing coursework, developed a personal approach to integrating EML within the course design process, and learned how to implement continual improvement of their own EML practice.

Visit for more information about KEEN.

Computer Science Faculty Students Attend Innovation and Technology Conference

Computer Science doctoral candidate Briana Bettin

The College of Computing and the Computer Science Department were well represented at the 24th Annual Conference on Innovation and Technology in Computer Science Education  (ITiCSE 19), July 14-17, at University of Aberdeen, Aberdeen, Scotland.

Senior Lecturer Leo Ureel, along with  James Heliotis,  professor of computer science at Rochester (New York) Institute of Technology, led a working group titled, “Towards an Ability to Direct College Students to an Appropriately Paced Introductory Computer Science Course.” Professor Linda Ott and Associate Professor Charles Wallace participated in the working group, “1.5 Degrees of Separation: Computer Science Education in the Age of the Anthropocene.”

PhD student Briana Bettin presented her paper, “More Effective Contextualization of CS Education Research: A Pair-Programming Example,” co-authored with Linda Ott and Leo Ureel.  Charles Wallace presented his poster, “A Prototype MATLAB Code Critiquer,” co-authored with Leo Ureel and undergraduate computer science student Marissa Walther.  Associate Professor Jean Mayo (ICC/CyberS) presented, ” Teaching Integer Security Using Simple Visualizations,” co-authored with Lecturer James Walker, recent PhD graduate Man Wang, Adjunct Professor and Professor and Chair of Computer Science at Western Michigan University Steven Carr, and Professor Ching-Kuang Shene.  Also attending the conference was computer science undergraduate Miriam Eikenberry-Ureel.


Bo Chen is PI of $200K NSF Research and Development Grant

Bo Chen, Assistant Professor of Computer Science

Bo Chen (Comp Sci/ICC) is Principal Investigator on a project that has received a $199,975 research and development grant from the National Science Foundation. The project is titled “EAGER: Enabling Secure Data Recovery for Mobile Devices Against Malicious Attacks.” This is a potential two-year project.

Abstract: Mainstream mobile computing devices like smart phones and tablets currently rely on remote backups for data recovery upon failures. For example, an iPhone periodically stores a recent snapshot to iCloud, and can get restored if needed. Such a commonly used “off-device” backup mechanism, however, suffers from a fundamental limitation that, the backup in the remote server is not always synchronized with data stored in the local device. Therefore, when a mobile device suffers from a malware attack, it can only be restored to a historical state using the remote backup, rather than the exact state right before the attack occurs. Data are extremely valuable for both organizations and individuals, and thus after the malware attack, it is of paramount importance to restore the data to the exact point (i.e., the corruption point) right before they are corrupted. This, however, is a challenging problem. The project addresses this problem in mobile devices and its outcome could benefit billions of mobile users.

A primary goal of the project is to enable recovery of mobile devices to the corruption point after malware attacks. The malware being considered is the OS-level malware which can compromise the OS and obtain the OS-level privilege. To achieve this goal, the project combines both the traditional off-device data recovery and a novel in-device data recovery. Especially, the following research activities are undertaken: 1) Designing a novel malware detector which runs in flash translation layer (FTL), a firmware layer staying between OS and flash memory hardware. The FTL-based malware detector ensures that data being committed to the remote server will not be tampered with by the OS-level malware. 2) Developing a novel approach which ensures that the OS-level malware is not able to corrupt data changes (i.e., delta) which have not yet been committed to the remote server. This is achieved by hiding the delta in the flash memory using flash storage’s special hardware features, i.e., out-of-place update and strong physical isolation. 3) Developing a user-friendly approach which can allow users to conveniently and efficiently retrieve the delta hidden in the flash memory for data recovery after malware attacks.

Link to an Unscripted article about related research at

Welcome and Invite to Reunion Celebration on Friday, August 2

Adrienne Minerick

Dear Alumni, Colleagues and Friends,

Welcome to Michigan Tech’s new College of Computing! By now you’ve received the latest Michigan Tech magazine and have read the announcement of Michigan Tech’s newest college. This is an exciting time at Michigan Tech as we reimagine existing programs, add new majors, and pursue innovative new initiatives to prepare our graduates—and Michigan Tech—for Industry 4.0!

As you saw in the magazine, Michigan Tech embraces an exciting, diverse learning and research community. Computing and information science are an essential part of it all. Computing skills and computational thinking are essential in virtually all fields and job markets today, and Michigan Tech’s College of Computing is in position to ensure all our graduates are prepared, comfortable, and agile in a world in which cyber-technologies influence virtually everything.

The new College of Computing (CC) merges a talented, forward-thinking, innovative group of faculty and staff. We oversee core undergraduate degrees in Computer Network and System Administration (CNSA), Computer Science, Cybersecurity, Electrical Engineering Technology, and Software Engineering, with minors in Computer Science, Cybersecurity, and Data Acquisition and Industrial Control.  Our graduate degrees include Computer Science (MS and PhD), Cybersecurity, Data Science, Health Informatics, and Mechatronics. On the research front, CC faculty and students are developing innovative software and hardware solutions to address today’s societal, technological, and sustainable challenges. Visit to learn more.

I am pleased to introduce myself as the founding Dean of the College of Computing, effective July 1, 2019. It is an honor to help launch the College of Computing and assist in positioning Michigan Tech for this new era.

By way of my background, I am a chemical engineering BS graduate of Michigan Tech (’98); I completed my MS and PhD in Chemical & Biomolecular Engineering at the University of Notre Dame du lac (USA). I returned to Michigan Tech in 2010, and am currently a Professor of Chemical Engineering. I have also served the University as Associate Dean for Research and Innovation for the College of Engineering, Assistant to the Provost for Faculty Development, and Dean of the School of Technology.

As you may know, Michigan Tech’s Alumni Reunion is just around the corner, August 1-3, 2019. Graduates from all years and majors are welcome, and we sincerely hope to reconnect with many of you—our computing/software and electronics/robotics alumni!

At a special celebration Friday, August 2, 1:00 to 4:00 p.m., we’ll be sharing additional information about the College of Computing, and showing off some of our senior design projects. It is our hope that you’ll gain a few new and fun memories at this event.  Please join us outside Rekhi Hall (weather permitting) or on the second floor of Rekhi Hall for this wonderful opportunity to catch up with everyone and share your best—and perhaps even some of your worst—Michigan Tech memories! Ice cream and light refreshments will be served. The event is free and guests and family members are welcome.

Please let us know if you’re able to attend this College of Computing event, and register for the Reunion, at We look forward to seeing you in Houghton!

Best regards,

Adrienne Minerick, PhD

Dean, College of Computing