Category Archives: Brown

Improving Reliability of In-Memory Storage

Electronic circuit board

Researcher: Jianhui Yue, PI, Assistant Professor, Computer Science

Sponsor: National Science Foundation, SHF: Small: Collaborative Research

Amount of Support: $192, 716

Duration of Support: 3 years

Abstract: Emerging nonvolatile memory (NVM) technologies, such as PCM, STT-RAM, and memristors, provide not only byte-addressability, low-latency reads and writes comparable to DRAM, but also persistent writes and potentially large storage capacity like an SSD. These advantages make NVM likely to be next-generation fast persistent storage for massive data, referred to as in-memory storage. Yet, NVM-based storage has two challenges: (1) Memory cells have limited write endurance (i.e., the total number of program/erase cycles per cell); (2) NVM has to remain in a consistent state in the event of a system crash or power loss. The goal of this project is to develop an efficient in-memory storage framework that addresses these two challenges. This project will take a holistic approach, spanning from low-level architecture design to high-level OS management, to optimize the reliability, performance, and manageability of in-memory storage. The technical approach will involve understanding the implication and impact of the write endurance issue when cutting-edge NVM is adopted into storage systems. The improved understanding will motivate and aid the design of cost-effective methods to improve the life-time of in-memory storage and to achieve efficient and reliable consistence maintenance.

Publications:

Pai Chen, Jianhui Yue, Xiaofei Liao, Hai Jin. “Optimizing DRAM Cache by a Trade-off between Hit Rate and Hit Latency,” IEEE Transactions on Emerging Topics in Computing, 2018. doi:10.1109/TETC.2018.2800721

Chenlei Tang, Jiguang Wan, Yifeng Zhu, Zhiyuan Liu, Peng Xu, Fei Wu and Changsheng Xie. “RAFS: A RAID-Aware File System to Reduce Parity Update Overhead for SSD RAID,” Design Automation Test In Europe Conference (DATE) 2019, 2019.

Pai Chen, Jianhui Yue, Xiaofei Liao, Hai Jin. “Trade-off between Hit Rate and Hit Latency for Optimizing DRAM Cache,” IEEE Transactions on Emerging Topics in Computing, 2018.

More details


Computer Science Workshop Held April 5-7

Explore CSR GroupMichigan Tech hosted the workshop “Exploring Computer Science Research” last Friday – Sunday (April 5-7). The workshop was one of 15 Google has sponsored in the U.S. and was organized by four CS Faculty: Leo Ureel, Linda Ott, Jean Mayo and Laura Brown; Jean Mayo and Laura Brown are members of the ICC. The workshop was for women and underrepresented groups to explore research and graduate school opportunities in computer science.

There were 26 attendees from six universities and colleges across Michigan and Wisconsin. Over the course of the weekend each student participated in a research experience, investigating a research question with a faculty mentor. Topics included:

Machine Vision – Robert Pastel, ICC Center for Human-Centered Computing

Data Science in Energy Systems – Laura Brown, ICC Center for Data Sciences

Cybersecurity and Privacy in Storage Systems – Bo Chen, ICC Center for Cybersecurity

Agent-based Simulations in Education – Leo Ureel

Human Computer Interactions: Natural Language Processing for Assistive Technologies – Keith Vertanen, ICC Center for Human-Centered Computing

After learning about and working on their research topics, the students presented out to the group. In addition to their research experiences, attendees learned about different job opportunities after graduate school, heard how to apply to graduate schools and talked to current graduate students about the graduate school experience and their research.

Guest speakers included Niloofar Gheissari and Anja Gruenheid, two Google employees, Pushpalatha Murthy, Dean of the Graduate School and Robin Hunicke, our keynote speaker from the University of California Santa Cruz and Funomena.